The CX6500 supports a wide range of applications that require the efficiency of Standard Cell, yet may be expected to require logic changes in the future. Typical applications include products that will be sold in a variety of versions, require regional adjustments, or products that cater to developing standards. The CX6500 products can be designed to include logic areas for future use to allow the addition of logic functionality without changing the remainder of the product. These products are particularly suitable for Consumer Markets, Industrial markets, Imaging and Communications products, as well as emerging applications due to the rapidly changing requirements.

Key Features and Benefits

• Ability to completely reconfigure on-chip logic
• 250-MHz maximum global operating frequency, 1-GHz local
• True ASIC gate count of up to 8M usable gates, using the ChipX 6th generation, fine grain Structured ASIC logic fabric
• High speed embedded SRAM up to 10Mbit
• Core operating voltage of 1.2 V
• Wide range of I/O options, including LVTTL, LVCMOS, HSTL, SSTL (18/2/3), LVDS (up to 500 Mb/s), RSDS, PCI, PCI-X, XOSC and others.
• Commercial and Industrial grade temperature libraries
• Configurable PLLs with Spread Spectrum tracking, output range of 10 MHz - 1 GHz
• Multiple DLLs with output frequency of up to 400 MHz can be placed in the logic area
• Packages from 56 QFN to 896 PBGA
• Fast time to prototypes and production

Design Flow

ChipX spends considerable development effort to ensure that taping out a design to a CX6500 Embedded Array is simple, painless, and low risk. ChipX provides libraries for Magma, Synopsys, and Synplicity ASIC synthesis tools.

ChipX has the unique ability to start working with early, unfinished RTL to start pre-processing and analysis of the design. As a result, the final layout and timing closure will be straightforward because any critical design features will have been identified already. This in turn decreases final prototype time and improves product quality.